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| CIMD6A SURFACE MOUNT, SUPERminiTM DUAL COMPLEMENTARY SILICON DIGITAL TRANSISTORS 50V, 100mA Central TM Semiconductor Corp. DESCRIPTION: The Central Semiconductor CIMD6A is a Dual Complementary Digital Transistor in a SUPERminiTM SOT-26R surface mount package, designed for switching applications, interface circuit and driver circuit applications. MARKING CODE: CD6 SOT-26R CASE MAXIMUM RATINGS PER TRANSISTOR (TA=25C) Collector-Emitter Voltage Collector-Base Voltage Emitter-Base Voltage Collector Current Power Dissipation Operating and Storage Junction Temperature Thermal Resistance TJ,Tstg JA -55 to +150 357 C C/W SYMBOL VCEO VCBO VEBO IC PD 50 50 5.0 100 350 UNITS V V V mA mW ELECTRICAL CHARACTERISTICS PER TRANSISTOR (TA=25C) SYMBOL ICBO IEBO BVCBO BVCEO BVEBO VCE(SAT) hFE * fT R1=R2 TEST CONDITIONS VCB=50V VEB=4.0V IC=50A IC=1.0mA IE=50A IC=5.0mA, IB=250A VCE=5.0V, IC=1.0mA VCE=10V, IC=5.0mA, f=100MHz 50 50 5.0 0.3 100 250 3.3 4.7 6.1 600 MHz K MIN TYP MAX 500 500 UNITS nA nA V V V V * Characteristic of transistor only R2 (6-August 2003) Central TM CIMD6A SURFACE MOUNT, SUPERminiTM DUAL COMPLEMENTARY SILICON DIGITAL TRANSISTORS 50V, 100mA Semiconductor Corp. SOT-26R CASE - MECHANICAL OUTLINE with Reverse Pin Configuration A F E B 4 5 6 C G H 3 2 1 I D J R0 Note: The R suffix added to case type indicates reverse pin configuration as compared with a standard SOT-26 case. All other package specifications are equivalent to SOT-26 package. Please refer to SOT-26 Package Details datasheet for Mounting Pad Geometry, Tape Dimensions & Orientation, Packaging Base, Reel Labeling & Packing Information, and Ordering information. 4 5 6 R1 Q2 R2 Q1 3 2 1 LEAD CODE: 1) COLLECTOR Q1 2) BASE Q2 3) EMITTER Q2 4) COLLECTOR Q2 5) BASE Q1 6) EMITTER Q1 MARKING CODE: CD6 R2 (6-August 2003) |
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